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Read e-book online Architectures for RF Frequency Synthesizers (The Springer PDF

By Cicero S. Vaucher

ISBN-10: 0306479559

ISBN-13: 9780306479557

ISBN-10: 1402071205

ISBN-13: 9781402071201

This article describes a conceptual framework for interpreting the functionality of PLL frequency synthesizers, and offers optimization tactics for different functionality elements. It includes simple details and in-depth wisdom, greatly illustrated with useful layout examples utilized in commercial items.

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Extra info for Architectures for RF Frequency Synthesizers (The Springer International Series in Engineering and Computer Science)

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Its noise contribution can be designed to be non-dominant, yet at the cost of increased total power dissipation. This consideration is especially important for low-power applications, because the loop filter’s circuitry can become the dominant source of power dissipation [14]. 4 DIMENSIONING OF THE PLL PARAMETERS — BASIC CONCEPTS In practice, PLL frequency synthesizers are never a system of the secondorder,5 as there are additional poles in the loop filter to provide adequate suppression of reference spurious breakthrough signals.

794–802, Dec. 1983. M. Verhoeven, “A High-Frequency Electronically Tunable Quadrature Oscillator,” IEEE Journal of Solid-State Circuits, vol. 27, no. 7, pp. 1097–1100, July 1992. J. Underbill, “Fundamentals of Oscillator Performance,” Electronics and Communication Engineering Journal, vol. 4, no. 4, pp. 185–193, Aug. 1992. C. Weigandt, B. R. Gray, “Analysis of Timing Jitter in CMOS Ring Oscillators,” in IEEE International Symposium on Circuits and Systems (ISCAS), 1994, vol. 4, pp. 27–30. [15] M.

The preceeding exposition shows that the phase-frequency detector has several advantages over the other types. On the other hand, the phase-frequency detector poses some challenges to the circuit designer: in practice, the PFD outputs are coupled to a single-ended charge-pump (CP), to simplify interfacing to the loop filter. Many charge-pump circuits create a dead-zone in the combined transfer function of the PFD/CP, which results in a decreased spectral purity performance when the loop is (nearly) phase-locked.

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Architectures for RF Frequency Synthesizers (The Springer International Series in Engineering and Computer Science) by Cicero S. Vaucher


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